Unterschiede

Hier werden die Unterschiede zwischen zwei Versionen gezeigt.

--- projekte:2020:euroone [2023/10/11 07:14]
max
+++ projekte:2020:euroone [2024/03/13 18:57] (aktuell)
max
@@ Zeile 1: / Zeile 1: @@
 {{:projekte:logo_v1.png?400|}}
-====== EuroOne CPU ======
+====== EURO One CPU ======
 Contact: [[user:nopx|nopx]]
@@ Zeile 8: / Zeile 8: @@
 ===== Summary =====
-I currently creating my own CPU from scratch. At first I am running it in Logisim, a logic simulator but I planed to build it in hardware subsequently. The long time goal is to run it mostly from transistors, resistors and capacities.  Except the microcode rom and the ram will be 74XX. Also I will by extremly happy if it can provide its own (static) website online.
+I currently creating my own CPU from scratch. At first I am running it in Logisim, a logic simulator but I planed to build a simplier version in hardware subsequently. Here is the overview on the current state of the simulated CPU:
-{{ :projekte:2020:screenshot_from_2023-10-11_09-07-26.png?600 |}}
+{{:projekte:2020:screenshot_from_2023-10-11_09-07-26.png?600 |}}
 ====== Control Panel ======
@@ Zeile 24: / Zeile 24: @@
 {{:projekte:2020:screenshot_from_2023-10-11_09-12-03.png?400|}}
-====== Memory-Mapped IO, Timer 1, and Interrupts ======
+====== Memory-Mapped IO, TIMER0, and INT0 ======
 {{:projekte:2020:screenshot_from_2023-10-11_09-13-11.png?400|}}
 ===== Status =====
 ==== 2020-05 ====
-I finished the pre-project: [[projekte:2020:4bitrelayadder|4Bit Relay Adder]] to gain some insights into relay logic. I decided to first build a much simpler 4 bit cpu from relays, without any transistor. You find the documentation of this second pre-project here: [[projekte:eurotwo|EuroTwo CPU]].
+I finished the pre-project: [[projekte:2020:4bitrelayadder|4Bit Relay Adder]] to gain some insights into relay logic. I decided to first build a much simpler 4 bit cpu from relays, without any transistor. You find the documentation of this second pre-project here: [[projekte:2021:eurotwo|EuroTwo CPU]].
 ===== Documentation =====