Unterschiede
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projekte:2020:euroone [2020/02/24 19:47] 127.0.0.1 Externe Bearbeitung |
projekte:2020:euroone [2024/03/13 18:57] (aktuell) max |
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- | ====== | + | ====== |
- | I currently creating my own CPU from scratch. At first I am running it in Logisim, a logic simulator but I planed to build it in hardware subsequently. The long time goal is to run it mostly from transistors, | + | Contact: [[user: |
- | As I cannot document | + | Projectstatus: |
+ | |||
+ | ===== Summary ===== | ||
+ | I currently creating my own CPU from scratch. At first I am running | ||
+ | |||
+ | {{: | ||
+ | |||
+ | ====== Control Panel ====== | ||
+ | {{: | ||
+ | |||
+ | ====== Microcode Processing ====== | ||
+ | {{: | ||
+ | |||
+ | ====== State Logic ====== | ||
+ | {{: | ||
+ | |||
+ | ====== Loading Logic ====== | ||
+ | {{: | ||
+ | |||
+ | ====== Memory-Mapped IO, TIMER0, and INT0 ====== | ||
+ | {{: | ||
+ | ===== Status ===== | ||
+ | |||
+ | ==== 2020-05 ==== | ||
+ | I finished the pre-project: | ||
===== Documentation ===== | ===== Documentation ===== | ||
+ | As I cannot document it here in detail I will upload my documentation from time to time. | ||
+ | |||
* {{ : | * {{ : | ||
* {{ : | * {{ : | ||
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+ | ===== Planned and ideas ===== | ||
+ | * Add UART Controller from ATMEGA32 | ||
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